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 PD - 91902A
SMPS MOSFET
IRF730A
HEXFET(R) Power MOSFET
Applications l Switch Mode Power Supply (SMPS) l Uninterruptable Power Supply l High speed power switching Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss Specified (See AN1001)
l
VDSS
400V
Rds(on) max
1.0
ID
5.5A
TO-220AB
G DS
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
5.5 3.5 22 74 0.6 30 4.6 -55 to + 150 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Typical SMPS Topologies:
l l
Single Transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset (Both US Line input only). 1
5/8/00
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IRF730A
Static @ TJ = 25C (unless otherwise specified)
Parameter Min. Drain-to-Source Breakdown Voltage 400 V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient --- RDS(on) Static Drain-to-Source On-Resistance --- VGS(th) Gate Threshold Voltage 2.0 --- IDSS Drain-to-Source Leakage Current --- Gate-to-Source Forward Leakage --- IGSS Gate-to-Source Reverse Leakage --- V(BR)DSS Typ. --- 0.5 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 1.0 VGS = 10V, ID = 3.3A 4.5 V VDS = VGS, ID = 250A 25 VDS = 400V, VGS = 0V A 250 VDS = 320V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 3.1 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 22 20 16 600 103 4.0 890 30 45 Max. Units Conditions --- S VDS = 50V, ID = 3.3A 22 ID = 3.5A 5.8 nC VDS = 320V 9.3 VGS = 10V, See Fig. 6 and 13 --- VDD = 200V --- ID = 3.5A ns --- RG = 12 --- RD = 57,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 320V, = 1.0MHz --- VGS = 0V, VDS = 0V to 320V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
290 5.5 7.4
Units
mJ A mJ
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
1.70 --- 62
Units
C/W 62
Diode Characteristics
IS
I SM
VSD t rr Q rr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 5.5 showing the A G integral reverse --- --- 22 S p-n junction diode. --- --- 1.6 V TJ = 25C, IS = 5.5A, VGS = 0V --- 370 550 ns TJ = 25C, IF = 3.5A --- 1.6 2.4 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRF730A
100 100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
10
10
1
1
4.5V
0.1
0.1
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.01 0.1
0.01 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.5
R DS(on) , Drain-to-Source On Resistance (Normalized)
5.9A ID = 5.5
I D , Drain-to-Source Current (A)
2.0
10
TJ = 150 C
1.5
1
TJ = 25 C
1.0
0.5
0.1 4.0
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRF730A
100000 VGS = 0V, f = 1 MHZ Ciss = C + C , C gs gd ds SHORTED Crss = C gd Coss = C + C ds gd
20
ID = 5.5 5.9A
10000
VGS, Gate-to-Source Voltage (V)
16
VDS = 320V VDS = 200V VDS = 80V
C, Capacitance(pF)
1000
Ciss Coss
12
100
8
10
4
Crss
1 1 10 100 1000
0 0 5 10
FOR TEST CIRCUIT SEE FIGURE 13
15 20 25
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED BY RDS(on)
ISD , Reverse Drain Current (A)
10us
10
TJ = 150 C
I D , Drain Current (A)
10 100us
1ms 1 10ms
1
TJ = 25 C
0.1 0.4
V GS = 0 V
0.6 0.8 1.0 1.2
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF730A
6.0
V DS VGS RG
RD
5.0
D.U.T.
+
I D , Drain Current (A)
4.0
-V DD
10V
3.0
Pulse Width 1 s Duty Factor 0.1 %
2.0
Fig 10a. Switching Time Test Circuit
VDS 90%
1.0
0.0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 PDM
0.1
0.05 t1 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF730A
1 5V
700
EAS , Single Pulse Avalanche Energy (mJ)
TOP
600
VDS
L
D R IV E R
BOTTOM
500
ID 2.5A 3.5A 5.5A
RG
20V tp
D .U .T
IA S
+ V - DD
400
A
0 .0 1
300
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS tp
200
100
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
IAS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
V DSav , Avalanche Voltage ( V )
610 600 590 580 570 560 550 540
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
0.0
IG ID
1.0
2.0
3.0
4.0
5.0
6.0
IAV , Avalanche Current ( A)
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRF730A
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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7
IRF730A
Package Outline
TO-220AB Outline Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A 6.47 (.255) 6.10 (.240) -B 4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LE AD A S SIG NME NT S 1 - GA TE 2 - DR A IN 3 - S OU RCE 4 - DR A IN
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X N OT ES : 1 DIMEN S IONING & T OLE R AN CIN G PE R A NS I Y14.5M, 1982. 2 CO NT RO LLING D IMEN S ION : IN CH
2.92 (.115) 2.64 (.104)
3 OUT LINE C ONF O RMS T O JED EC O UT LIN E TO -220A B. 4 HE A TS IN K & LE A D ME AS UR E MEN TS D O NO T INC LU DE B U RRS .
Part Marking Information
TO-220AB
E X A M P L E : T H IS IS A N IR F 1 0 1 0 W IT H A S S E M B L Y LOT CODE 9B1M
A
IN T E R N A T IO N A L R E C T IF IE R LOGO ASSEMBLY LOT CO DE
PART NUMBER IR F 1 0 1 0 9246 9B 1M
D ATE C ODE (Y Y W W ) Y Y = YE A R W W = W EEK
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Starting TJ = 25C, L = 19mH
RG = 25, IAS = 5.5A. (See Figure 12)
ISD 5.5A, di/dt 90A/s, VDD V(BR)DSS,
TJ 150C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111 IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936 Data and specifications subject to change without notice. 5/00
8
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